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Memory cell
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#	Item
171	A Portable Runtime Interface For Multi-Level Memory Hierarchies Mike Houston Ji-Young Park Manman Ren Add to Reading List Source URL: theory.stanford.edu Language: English - Date: 2008-01-23 13:23:59 Cell Symmetric multiprocessing Stream processing Computer cluster Remote direct memory access OpenMP Virtual machine Multi-core processor Thread Computing Parallel computing Message Passing Interface
172	Big data processing platforms Express5800/Scalable HA Server Achieving High Reliability and Scalability NASU Yasuyuki Abstract Add to Reading List Source URL: www.nec.com Language: English - Date: 2014-03-26 09:04:02 Computer buses Server hardware Mainframe computer Scalability Server PCI Express Conventional PCI Cell In-Memory Processing Computing Computer hardware Computer architecture
173	NeuFlow: Dataflow Vision Processing System-on-a-Chip Phi-Hung Pham∗ , Darko Jelaca∗ , Clement Farabet† , Berin Martini∗ , Yann LeCun† and Eugenio Culurciello∗ ∗ Purdue University, West Lafayette, Indiana Add to Reading List Source URL: yann.lecun.com Language: English - Date: 2012-05-23 14:15:19 Digital electronics Cell Direct memory access System on a chip Field-programmable gate array Embedded system Parallel computing Reconfigurable computing Electronic engineering Computer hardware Computer architecture
174	VM-Based Shared Memory on Low-Latency, Remote-Memory-Access Networks1 Leonidas Kontothanassis2 , Galen Hunt, Robert Stets, Nikolaos Hardavellas, Michał Cierniak, Srinivasan Parthasarathy, Wagner Meira, Jr., Sandhya Dwar Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-03-31 21:35:13 Computer architecture Parallel computing Computer memory Distributed shared memory CPU cache Cache Cell Shared memory Scalability Computing Concurrent computing Distributed computing architecture
175	COVER FEATURE Dynamically Tuning Processor Resources with Adaptive Processing Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2004-01-03 18:19:54 Cache Computing CPU cache Computer memory Cell Computer architecture Central processing unit Computer hardware
176	Evaluation of Multiprocessor Memory Systems Using Off-Line Optimal Behavior* WILLIAMJ. BOLOSKY A N D MICHAEL L. SCOTT Computer Science Department, University of Rochester, Rochester, New York[removed] Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2004-06-20 01:29:57 Cache Computing CPU cache Central processing unit Parallel computing Cell Computer memory Computer architecture Computer hardware
177	Hindawi Publishing Corporation ISRN Immunology Volume 2013, Article ID[removed], 8 pages http://dx.doi.org[removed][removed]Research Article Add to Reading List Source URL: downloads.hindawi.com Language: English - Date: 2014-08-14 14:12:40 Anatomy T helper cell QuantiFERON Memory T cell Interferon-gamma PD-1 Cytokine Antigen Tuberculosis T cells Biology Immune system
178	2-Bit-per-Cell 256-Mbit NOR Flash Memory for 3G Mobile Phone Market Add to Reading List Source URL: phys.org Language: English - Date: 2015-02-10 03:54:34 Computing Digital media Flash memory Dynamic random-access memory Synchronous dynamic random-access memory Random-access memory Phase-change memory Computer memory Computer hardware Non-volatile memory
179	Symposium Brief From Cell to Society: Creating a world where all children can succeed February 6th, 2014 A multidisciplinary group of 10 experts from the U.K., the U.S. and Canada, joined together in memory of the late C Add to Reading List Source URL: www.icra.ca Language: English - Date: 2014-06-10 16:02:49 Medicine Health economics Demography Social determinants of health Health equity Michael Marmot Child development Intelligence quotient Health Public health Health promotion
180	A Machine-Independent DMA Framework for NetBSD Jason R. Thorpe1 Numerical Aerospace Simulation Facility NASA Ames Research Center Abstract One of the challenges in implementing a portable Add to Reading List Source URL: www.netbsd.org Language: English - Date: 2008-05-31 06:43:42 Direct memory access NetBSD Conventional PCI Industry Standard Architecture Cell TURBOchannel DECstation Q-Bus C dynamic memory allocation Computer hardware Computer buses Computing

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